anyone know low level assembly?

[milo hobgoblin]

PM me.. need some help. Trying to write some code to determine if Chipset/CPU is APIC or PIC compliant. Thanks in advance.

 

[javaguru]

Nope, i only know 3GL

 

[Sassy69]

PM me.. need some help. Trying to write some code to determine if Chipset/CPU is APIC or PIC compliant. Thanks in advance.

8086/88 or Motorola?

I think I burned those books when I completed my master's and went thru the deprogramming phase.

 

[SoreArms]

LOL, I learned that for like a semester then threw it out of my brain

Ironically, my company still writes motion control software/firmware with assembly

 

[Kakdiesel]

fuck im asian and i think you all are nerds

 

[jafo]

fuck im asian and i think you all are nerds

lol

 

[WarriorPL]

fuck im asian and i think you all are nerds

LMAO!

 

[blut wump]

Do you know what the basic test is for the difference between APIC and PIC capability?

 

[pintoca]

I hated every minute ot that term...

MOV
ADD

shit

 

[Razorguns]

Damn, i learned that MOV AH,4C INT 21 stuff when I was 12 y/o cracking games.

I've moved on and forgot all that shit unfortunately.

 

[blut wump]

I suspect that this is going to involve simply checking for the presence of the CPUID instruction.

If the instruction exists, execute it and check EAX
0 => Processor string dumped into EBX, ECX, EDX
1 => feature capability flags dumped EBX, ECX, EDX

This code will check for the presence of CPUID
PUSHA
PUSHFD
POP EAX
MOV EBX,EAX
XOR EAX,00200000H ;toggle bit 21
PUSH EAX
POPFD
PUSHFD
POP EAX
CMP EAX,EBX
JZ SHORT @@exit ;CPUID not available
;continue here... with executing CPUID
XOR EAX,EAX ;get CPU string
CPUID
MOV [cpu_string],EBX
OR EAX,EAX ;condition flags for coming JZ
MOV [cpu_string + 4],EDX
MOV [cpu_string + 8],ECX
JZ SHORT @@exit ;no CPUID functions
MOV EAX,1 ; get CPU flags
CPUID
MOV [cpu_info1],EBX
MOV [cpu_info2],EDX
MOV [cpu_info3],ECX
@@exit: POPA
RET

I can't remember what the bits indicate assuming you reached that stage and you need to check for Pentium-class capability across the AMD and Intel chip which might be satisfied by checking the chip names and it might be uneccessary to run CPUID a second time. I've never had to perform the check for APIC but I used the above code to check for presence of MMX registers and instructions; MMX flag being a test with 0x800000 on EDX.

 

[blut wump]

Have you checked www.Intel.com ? Lots of great info there.

 

[blut wump]

Processor manuals:
http://developer.intel.com/design/pentium/manuals/

 

[blut wump]

 

[Gambino]

I suspect that this is going to involve simply checking for the presence of the CPUID instruction.

If the instruction exists, execute it and check EAX
0 => Processor string dumped into EBX, ECX, EDX
1 => feature capability flags dumped EBX, ECX, EDX

This code will check for the presence of CPUID
PUSHA
PUSHFD
POP EAX
MOV EBX,EAX
XOR EAX,00200000H ;toggle bit 21
PUSH EAX
POPFD
PUSHFD
POP EAX
CMP EAX,EBX
JZ SHORT @@exit ;CPUID not available
;continue here... with executing CPUID
XOR EAX,EAX ;get CPU string
CPUID
MOV [cpu_string],EBX
OR EAX,EAX ;condition flags for coming JZ
MOV [cpu_string + 4],EDX
MOV [cpu_string + 8],ECX
JZ SHORT @@exit ;no CPUID functions
MOV EAX,1 ; get CPU flags
CPUID
MOV [cpu_info1],EBX
MOV [cpu_info2],EDX
MOV [cpu_info3],ECX
@@exit: POPA
RET

I can't remember what the bits indicate assuming you reached that stage and you need to check for Pentium-class capability across the AMD and Intel chip which might be satisfied by checking the chip names and it might be uneccessary to run CPUID a second time. I've never had to perform the check for APIC but I used the above code to check for presence of MMX registers and instructions; MMX flag being a test with 0x800000 on EDX.

flux capictor

 

[blut wump]

2.21 jiggawhats?

 

[SoreArms]

oh yeah, I forgot I also used assembly when I was trying to learn how to hack DTV cards

LOL, that was pretty fun

 

[milo hobgoblin]

Sorry I couldnt get back sooner. Ill look it over Blut. All I could find were flag tests for the various CPU types using Pushf and Pushfd but nothing specifically related to APIC/PIC which is more related to chipset architecture.

I actually have a variant of that code you included with a Sysprep package I use.

Thanks.

 

[Sassy69]

I suspect that this is going to involve simply checking for the presence of the CPUID instruction.

If the instruction exists, execute it and check EAX
0 => Processor string dumped into EBX, ECX, EDX
1 => feature capability flags dumped EBX, ECX, EDX

This code will check for the presence of CPUID
PUSHA
PUSHFD
POP EAX
MOV EBX,EAX
XOR EAX,00200000H ;toggle bit 21
PUSH EAX
POPFD
PUSHFD
POP EAX
CMP EAX,EBX
JZ SHORT @@exit ;CPUID not available
;continue here... with executing CPUID
XOR EAX,EAX ;get CPU string
CPUID
MOV [cpu_string],EBX
OR EAX,EAX ;condition flags for coming JZ
MOV [cpu_string + 4],EDX
MOV [cpu_string + 8],ECX
JZ SHORT @@exit ;no CPUID functions
MOV EAX,1 ; get CPU flags
CPUID
MOV [cpu_info1],EBX
MOV [cpu_info2],EDX
MOV [cpu_info3],ECX
@@exit: POPA
RET

I can't remember what the bits indicate assuming you reached that stage and you need to check for Pentium-class capability across the AMD and Intel chip which might be satisfied by checking the chip names and it might be uneccessary to run CPUID a second time. I've never had to perform the check for APIC but I used the above code to check for presence of MMX registers and instructions; MMX flag being a test with 0x800000 on EDX.

My head just exploded.

 

[Sassy69]

Punch cards anyone?

 

[milo hobgoblin]

LOL Sassy.. I can follow most of it and it still makes my head explode.

Reading other peoples assembly is probably one of the hardest things to do in programming. Without good comments it almost impossible to read your own code after a while.

and punch cards sucked.

 

[blut wump]

My head just exploded.

LOL

The messing about with PUSHFD and POP EAX and vice versa is to check whether the control register will take the change to bit 21. If the bit can be toggled then the CPUID instruction is available. That code is there to prevent inadvertantly executing the instruction on a cpu that doesn't have it since you'll just gen an illegal instruction exception.

The rest of it is getting the CPU vendor string and, again if it's avalable, getting the cpu capability bits.

I've never had to test cpu capability for apic features so you're on your own there. It may be possible just to interrogate the cpu string for known-valid processors - pentiums, amd k6s and k7s etc. I really don't know.

 

[Sassy69]

LOL Sassy.. I can follow most of it and it still makes my head explode.

Reading other peoples assembly is probably one of the hardest things to do in programming. Without good comments it almost impossible to read your own code after a while.

and punch cards sucked.

I worked w/ a guy at Motorola where we wrote pager code (Motorola assembler) in the early 90s. He wrote like 100,000 lines w/ no comments at all. Nutty.

 

[blut wump]

The labels should give all the comments you need.

 

[javaguru]

I worked w/ a guy at Motorola where we wrote pager code (Motorola assembler) in the early 90s. He wrote like 100,000 lines w/ no comments at all. Nutty.

It's called job security because it's so damned hard for anyone else to support they can't let him go.

 

[Gambino]

all of you